Alan Crouch is vice president of the Intel Labs and director of the Communications Technology Lab for Intel Corporation. His lab’s focus areas include mobile broadband innovation, advanced wireless platforms, energy-efficient communications, silicon photonics, performance networking and network security services.
Visit Alan’s corporate bio to find out more about him.
Alexander Sterkin, has a M.Sc degree in from Moscow Institute of Radio-engineering Electronics and Automation, specializing in biomedical electronics and equipment. Alexander did his Ph.D. in Weizmann institute of Science of Israel in Brain Research, specializing in characterization of spatio-temporal dynamics of visual cortex activity. Currently Alexander is a Senior SW Application Engineer, of the Developer Relationship Division in Intel, his charter is SW enabling: Influencing world-wide leading software vendors; SW optimization and evangelism.
Ali-Reza Adl-Tabatabai is a Senior Principal Engineer in Intel’s Programming Systems Lab. He leads a team of researchers working on compilers and scalable runtimes for future Intel Architectures. Ali has spent most of his career building high-performance programming language implementations, including static and dynamic optimizing compilers and language runtime systems. His current research concentrates on language features that make it easier for the mainstream developer to build reliable and scalable parallel programs for future multi-core architectures and on architectural support for those features. Most recently he has worked on transactional memory, a new concurrency control mechanism that avoids many of the pitfalls of lock-based synchronization. Ali has published over 20 papers in leading conferences and journals. He received his PhD in Computer Science from Carnegie Mellon University.
Dr. Ansheng Liu is currently a Principal Engineer with the Corporate Technology Group, Intel Corporation, Santa Clara, California, where he is developing silicon photonic devices and circuits for high speed optical interconnect and communications. He is one of the key contributors to Intel’s recent technology breakthroughs in fast silicon optical modulators and continuous-wave Raman silicon amplifiers and lasers. Before joining Intel in 2000, he worked at NASA Ames Research Center, Moffett Field, California; the National Institute of Standards and Technology, Gaithersburg, Maryland and at the University of Aalborg, Denmark as an assistant professor. His interests include nonlinear optics of nanostructures, near-field optics, opto-electronics, and photonics. He has authored or co-authored more than 90 publications in these fields and contributed to more than 40 patents. He was awarded the Intel Achievement Award and a Visiting Professorship at Sichuan University, Chengdu, China, in 2005. He has been a reviewer for various prestigious journals. He is the member of OFC/NFOEC 2007 and 2008 program committee. He has also been an invited speaker for various international conferences.
Dr. Liu received a B. S. degree in semiconductor physics from Sichuan University, Chengdu, China, in 1982, an M. S. degree in semiconductor physics from Zhongshan University, Guangzhou, China, in 1985, and a Ph. D. degree in physics from the University of Aalborg, Aalborg, Denmark, in 1992.
Anwar is a Principal Engineer with Intel’s Microprocessor Technology Lab, working on diverse topics such as parallel language and compiler design, parallel architecture evaluation, optimizing memory system performance, and multimedia applications. Anwar Ghuloum earned degrees at the University of California, Los Angeles (B.S., Computer Science and Engineering) and Carnegie Mellon University’s School of Computer Science (Ph.D., Computer Science, 1996), where his thesis introduced concepts of Nested Data Parallel idioms to traditional automatic parallelizing compilers. Before joining Intel, he co-founded and was the CTO of a fab-less semiconductor startup called Intensys that built programmable, highly parallel image and video processors for the consumer electronics market. Prior to that, Anwar developed novel predictive drug design software for early lead optimization using 3D surface pattern recognition techniques for a biotech startup called MetaXen (acquired by Exelexis Pharmaceuticals). He has also served as a post-doctoral research associate at Stanford University’s Computer Science department. A recurring theme in Anwar’s work has been to bridge high-level application knowledge and low-level parallel architecture constraints with careful parallel language and compiler design to achieve the optimal trade-offs in productivity and performance. Currently, Anwar leads a group of researchers applying this philosophy to Tera-scale software development tools in media, gaming, and high performance computing.
In his spare time, Anwar is an avid road cyclist, primarily climbing up and down local roads in the Bay Area but recently conquering the legendary and fearsome Angliru climb in the Asturias province of Spain and l’Alpe d’Huez in France. He also enjoys tinkering with and building bikes, traveling, is a frustrated artist (painting - oil and acrylic), is a wine enthusiast, and tries to keep up with his 3 kids.
The future is Brian David Johnson’s business. As a Consumer Experience Architect he develops future products for the Intel Corporation. His responsibilities include researching, defining and mapping the public’s experience with future products and services. Before joining Intel, he served as executive producer on several interactive television deployments in Scandinavia, Europe and the United States for British Airways, The Discovery Channel and New Line Cinema’s The Lord of the Rings. Johnson speaks and writes extensively about future technologies in articles and scientific papers as well as in science fiction novels (Fake Plastic Love, the forthcoming This is Planet Earth) and short stories. He has directed two feature films and a commissioned painter. June 2010 will see the publication of his book “Screen Future: The Future of Entertainment, Computing and Devices we Love.”
Co-editor of the Research@Intel blog, Brian is a Technology Strategist for Intel’s Corporate Technology Group where he leads the global communication of Intel’s mobile technologies and communications research. Brian is a leading advocate for the Carry Small Live Large philosophy, believing that devices will get ever smaller, while our need for and use of them gets ever larger. Brian has been a long-time lover of mobile devices beginning with his trusty Palm III.
Changkyu Kim is a research scientist in Intel’s Throughput Computing Lab, Santa Clara, California. His research interests include high-performance microprocessors, memory systems, and parallel processor architectures. Currently, Throughput Computing is a major priority for his research interest — analysis of emerging applications including database/data-mining, AI, physical simulation, and visibility computation with upcoming architecture trends, such as multi/many-core, GPU and heterogeneous computing. Before joining Intel Labs, Kim has the BS and MS degrees in computer engineering from Seoul National University, Korea. He received a PhD in computer science from the University of Texas at Austin.
Co-editor of the Research@Intel blog, Cheryl is the Social Media Program Manager for Intel’s Corporate Technology Group and has taken on the role of videographer to showcase the cool research going on in the labs. She joined Intel in 2000 and has worked in various roles within the Corporate Technology Group for the last 5 years.
Divya Kolar holds a M.S in Computer Science conferred in 2006 from Portland State University. She joined Intel in 2005 and has previously worked as a Network Software Engineer where she was an active researcher in various security and manageability technologies like Intel® Active Management Technology. Today she is a Technical Marketing Engineer in the Intel’s largest research group and is responsible to promote Intel technologies to partners besides performing ecosystem enabling and competitive technology analysis for Intel Labs’ research.
Intel Fellow, Corporate Technology Group
Director, Circuit Research Lab
INTEL CORPORATION
Greg Taylor is an Intel Fellow and director of the Circuit Research Lab in Intel’s Corporate Technology Group. He is responsible for research on low power and high speed circuits, high speed signaling, and enabling design and circuit technologies within Intel.
Taylor joined Intel in 1991 and has held several senior design engineering positions working on 10 generations of microprocessors including members of Intel’s Pentium®, Pentium® II, Pentium® III, and Intel NetBurst® microarchitecture families. Prior to joining Intel, he worked as a principal engineer at Bipolar Integrated Technology.
Taylor is a Fellow of the Institute of Electrical and Electronics Engineers. He received his bachelor’s degree in computer and systems engineering in 1981 from Rensselaer Polytechnic Institute (RPI). He also received a master’s degree and doctorate in computer and systems engineering from RPI in 1983 and 1985, respectively. His graduate work was completed with the support of a Fellowship from the Fannie and John Hertz Foundation.
Guy AlLee is a computer industry veteran with over 25 years experience in computer architecture, hardware, and software. He is a Research Scientist in Intel Labs, Intel’s research arm, delivering breakthrough technologies that bring the benefits of the ongoing digital revolution to everyone. For the last serveral years he has been working on 380VDC for the Data Center. He recently moved to New Mexico to open Intel Labs’ New Mexico Microgrid Lab, part of the Energy Systems Research Lab which envisions the smart-grid with energy-smart homes and offices and neighborhoods as the next big inflection point since PCs, cell phones and the Internet. He holds a BSEE, an MSECE and is currently an ECE Doctoral Candidate at Portland State University.
Jeff is the Strategy and Business Initiative Director for Intel Lab’s Photonics Technology Lab. He works across the lab, external lab engagements and the Intel Business Units to drive the photonics research into product opportunities. He is also responsible for PTL’s outbound marketing initiatives. Prior to his current role Jeff worked on research and product development programs in the Enterprise Computing Group, the Super Computing Group, and the Assembly Technology Development Group. He gained his customer experience by leading a customer technical team in the field, and gained his marketing experience as Strategy and Executive Programs manager in Corporate Marketing for Intel’s Developer Forum.
Jeff holds a Bachelor of Science Degree in Computer Science from Arizona State University.
Jeff is a Technology Strategist in Intel’s Microprocessor Technology Labs, part of Intel’s Corporate Technology Group. Jeff plays the role of Program Manager for some of the many innovative technologies that come out of the labs, with a particular focus on Tera-Scale computing. This includes advanced workloads such as real time ray-tracing, game physics, video enhancement tools, and gesture recognition; memory technologies capable of pushing hundreds of gigabytes per second; and next generation interconnects that scale to dozens (and eventually hundreds) of cores.
Jeff started working at Intel in 1998 as an intern, and eventually joined full time in 2001 after graduating with a B.S. in Computer Engineering from Rensselaer Polytechnic Institute in New York. He has a strong background in platform component validation before moving to the technology labs. Jeff is a technology enthusiast in all areas, and a real advocate for advanced visual computing, looking forward to the next generational leap in computer architecture.
Dr. Jeff Foerster joined Intel in August 2000 as a Wireless Researcher with Intel Labs in Hillsboro, Oregon. He is currently a manager and Principal Engineer in the Communications Technology Lab (CTL) in CTG, primarily focusing on short-range wireless and related technologies, including Ultra-wideband (UWB) technology, 60 GHz radio systems, video/display compression techniques, and source-channel coding. He is also chair of the Intel PHY Communications Research Council which reviews and approves grants to universities in the optical, RF circuits, and communications systems areas.
Jerry Bautista is the Director of Technology Management for Intel’s Microprocessor Research Laboratory and is chartered with driving the transfer of the lab’s research into product development and helping to set Intel’s strategic research agenda for future microprocessors. He co-leads the Intel Tera-scale Computing Research program, driving technologies for highly parallel, compute intensive applications and platforms. In addition, he leads a cross-Intel effort to explore memory/interconnect bandwidth challenges/solutions for future server and client platforms. Previous to joining Intel, Jerry was the CTO of an optical device start-up and spent 13 years at Lucent Technologies in the field of optical components and communication systems/networks, with assignments ranging from basic research (at Murray Hill Bell Labs) to development, operations and strategic marketing. He received his B.S. from Stanford University and PhD from Princeton University.
James Held leads a virtual team of senior architects chartered with developing the architectural framework and research roadmap for the Corporate Technology Group’s Tera-Scale Computing Research. Visit Jim’s corporate bio to find out more about him.
John Du is the General Manager of Intel China Research Center (ICRC), responsible for managing ICRC R&D activities at Communications, Microprocessor and System areas and driving strategic technology collaborations with Chinese industry, academia and government. In 1994, Dr. Du joined Intel in Oregon, U.S. Before taking his current position, he worked as Personal Conferencing Product Group Sr. Software Engineer, Intel Architecture Lab Sr. architect, Intel Online Services technical manager, Intel China IXA Development Center Director and Communications Technology Lab director in ICRC.
Dr. Du participated and led Proshare Video Conference system and OSS data center system product development work. When he was at Intel Architecture Lab, Dr. Du led a research team and made significant accomplishments on Internet multicast video streaming technologies, HDTV standard development and prototypes. Dr. Du came back to China in 2001. Over the past 6 years, he has contributed significantly for Intel on people hiring and development, organization development and competency growth in China, also built strategic relationship with Chinese government, academia, and industry.
Dr. Du has over 15 years of technical and management experience in networking, communications and system area. Dr. Du holds 4 patents and has more than 10 technical publications in the area of network communications and signal processing.
Dr. Du received his B.S., M.S. and Ph.D. in Electrical Engineering in 1983, 1986 and 1989 respectively.
Justin Rattner is an Intel Senior Fellow and director of Intel’s Corporate Technology Group. He also serves as the corporation’s chief technology officer (CTO). He is responsible for leading Intel’s microprocessor, communications and systems technology labs and Intel Research.
In 1989, Rattner was named Scientist of the Year by R&D Magazine for his leadership in parallel and distributed computer architecture. In December 1996, Rattner was featured as Person of the Week by ABC World News for his visionary work on the Department of Energy ASCI Red System, the first computer to sustain one trillion operations per second (one teraFLOPS) and the fastest computer in the world between 1996 and 2000. In 1997, Rattner was honored as one of the Computing 200, the 200 individuals having the greatest impact on the U.S. computer industry today, and subsequently profiled in the book Wizards and Their Wonders from ACM Press.
Rattner has received two Intel Achievement Awards for his work in high performance computing and advanced cluster communication architecture. He is a longstanding member of Intel’s Research Council and Academic Advisory Council. He currently serves as the Intel executive sponsor for Cornell University where he serves on the External Advisory Board for the School of Engineering.
Rattner joined Intel in 1973. He was named its first Principal Engineer in 1979 and its fourth Intel Fellow in 1988. Prior to joining Intel, Rattner held positions with Hewlett-Packard Company and Xerox Corporation. He received bachelor’s and master’s degrees from Cornell University in Electrical Engineering and Computer Science in 1970 and 1972, respectively.
With over 17 years in technology development, Kapil is driving strategic mobile technologies and industry enabling standards and architectures at Intel. Kapil is a Research Scientist at Intel Labs, and serves as Security Architect for Intel’s emerging ultra low power mobile platforms and multi-core systems. Kapil is the Technical Editor of the Ecma TC32-TG21 “Network Proxy” standard, and contributor to CSCI Client Power Management. Kapil received IEEE recognition for his contributions in publishing IEEE 802.11r (Secure Fast Roaming) standard, and has significant security contributions at IEEE 802.11w (Protected WLAN Management), 802.11z (WiFi Video) and emerging 802.11ad (60 GHz) standards. His current research includes Smart Grids Security and Networking.
An entrepreneur and technologist, Kapil was Director and Architect for startup Corrent, designing Security ASICs for optical networks. Kapil was Principal Engineer at AGCS (bought by Lucent), where he designed the ROAMEO GSM/3G cellular system, ClientCare multi-media Service Provider Contact Center, and previously on the design team of Motorola IRIDIUM.
Kapil has MS Computer Science (ASU), MBA (UoP), and BS Computer Science (IT-BHU, India). Kapil has multiple patents, published papers, open-source contributions (Linux, OpenSSL, OpenCryptoki), and is a frequent conference speaker.
Dr. Kevin Kahn is an Intel Senior Fellow, the corporation’s highest technical position. His responsibilities include all communications technologies including radio, optical, and copper physical layer technologies, CMOS communications circuits work, packet processing, and higher layer protocols. Additionally, he helps drive communications strategies and policy for the corporation. Some of his primary current focuses are broadband access to the home, wireless LANs and PANs, spectrum policy, and related Internet issues. He currently serves on the Computer Science and Telecommunications Board of the National Research Council, the Department of Commerce Spectrum Management Advisory Committee, and on various academic advisory committees. He is a past member of the FCC Technological Advisory Council.
Krishnamurthy Soumyanath (Soumya) is an Intel Fellow and director of the Communications Circuits Research, part of the Corporate Technology Group.
Soumya joined Intel in 1996, working in the Circuits Research Laboratory and leading the high-performance circuits research group. His team developed several high-speed data path components used in microprocessors. During his Intel career, Soumya has held a number of engineering and management positions in the area of semiconductor circuit design. He has published more than 50 papers and has had more than 30 patents issued.
He is currently responsible for leading research and development activity on circuits and architectures for next-generation transceiver devices. His team’s efforts are focused on increasing the abilities of digital processing in wired and wireless communications systems and in making them compatible with scaled CMOS devices.
Soumya earned his bachelor’s degree in electrical engineering from the National Institute of Technology in Tiruchirappalli, India in 1979 and his master’s degree in the same discipline in 1985 from the Indian Institute of Science, Bangalore. He received his Ph.D. in computer science and engineering from the University of Nebraska in 1993.
Maria Bezaitis became Director of Intel’s People and Practices Research Group in June 2006. Previously she held management positions in marketing and research at Apopleo, Inc., a wireless strategy and network integration firm based in Chicago. Prior to that, she spent four years leading ethnographic research teams and developing the Advanced Research competency at Sapient Corporation, a business consulting and technology services firm. She started her professional career at E-Lab, a firm that pioneered the use of ethnography for product and service development, where she was a managing partner.
Bezaitis has written and presented on topics including collections & seriality, photographic images and identity, the role of social research and design for technology innovation and development. Bezaitis earned a B.A. in French Literature from Dartmouth College and a Ph.D. from Duke University, in French Literature and Cultural Studies.
Dr. Mario J. Paniccia is an Intel Fellow and director of the Photonics Technology Lab. He joined Intel in 1995 as a lead researcher developing a novel optical testing technology for probing transistor timing in microprocessors. Paniccia currently directs a research group in the area of Silicon Photonics. The team is focused on developing silicon-based photonic building blocks for future use in enterprise and data center communications.
In 2008 Paniccia was named by R&D Magazine as “Scientist of the Year” for his team’s pioneering research in the area of Silicon Photonics. He has received two Intel Achievement Awards and has published numerous papers, including three Nature papers, three Nature Photonics papers, three book chapters, and has over 67 patents issued or pending. He is a fellow of the IEEE, SPIE and OSA.
For more information on silicon photonics, visit www.intel.com/go/sp
Markus Weingartner is Intel Press Programs Manager for Europe, Middle East and Africa based in Munich, Germany. He is responsible for developing and managing Intel’s technical press programs in the EMEA developed and emerging markets. He is also managing all Technology and Manufacturing Group, Intel Labs and Intel Labs Europe related press programs in the EMEA region. Before Markus joined the Intel EMEA public relations team he was an Intel application engineer where he worked together with ISVs on software optimization/development projects for the first Intel Pentium® 4 Processor and its follow-on processors. Markus assumed his current role in June 2002.
Prior to joining Intel in February 2000, Markus attended the Munich University of Applied Sciences in Germany. He holds a degree in Electrical Engineering (Data and Information Technology).
Michael E Kounavis is a Senior Research Scientist working with the Corporate Technology Group at Intel Corporation. Michael is responsible for conducting research on novel digital arithmetic and cryptographic algorithms with the aim of accelerating a wide range of client, server, and networking applications. Michael is a co-inventor of the CRC32 SSE4 instruction of the Core i7 architecture used for iSCSI CRC generation. He is also a co-recipient of an Intel Achievement Award (2008) for his work on Intel’s upcoming AES acceleration instructions.
Mike Morse is a Principal Engineer and leads photodetector research at Intel’s Photonics Technology Lab.
Ravi Sahita is a Senior Researcher in the Communication Technology Lab in Intel’s Corporate Technology Group. Ravi is currently working on platform approaches to address computer security issues. Ravi has contributed to Intel® AMT, Intel® NetStructure® products and the open sourced Intel® Common Open Policy Services (COPS) client SDK. Ravi is a contributing member of the Internet Engineering Task Force (IETF) and the Trusted Computing Group (TCG) standards bodies. He received his B.E. in Computer Engineering from the University of Bombay, and an M.S. in Computer Science from Iowa State University.
Renee Kuriyan is a research scientist in Intel Corporation’s People and Practices Research group. She holds a PhD from the University of California, Berkeley focused in development studies. She has a Masters degree in Public Affairs from Princeton University’s Woodrow Wilson School with a focus in international development and science and technology policy. She has extensive experience conducting research on a range of technology and development topics in emerging economies. This includes projects with the World Bank, United Nations Development Program, NGOs, and Microsoft Research India. Her current research focuses on the cultural politics of consumption, the middle class and globalization. She continues to conduct research on the political economy of information and communication technologies and development (ICTD).
Richard Uhlig is an Intel Fellow and chief architect for Intel’s Virtualization Initiative. Uhlig started virtualization efforts within Intel in 1998 as a research project in the Corporate Technology Group (CTG) and has since led the definition of multiple generations of virtualization architecture for Intel processors and platforms, known collectively as “Intel Virtualization Technology” (Intel® VT). Intel VT is today used in a variety of settings and applications to improve the utilization, management, availability, and security of systems based on Intel Architecture. Visit Rich’s corporate bio to find out more about him
Roy Want is a Principal Engineer at Intel Research Santa Clara, California, and leader of the Ubiquity Group. He is responsible for exploring long-term strategic research opportunities in the area of Ubiquitous & Pervasive Computing. His interests include mobile computing, wireless protocols, hardware design, embedded systems, distributed systems, automatic identification (RFID), and micro electromechanical systems(MEMS).
Want received his BA in computer science from Cambridge University, UK in 1983 and continued research at Cambridge into reliable distributed multimedia-systems. He earned a PhD in 1988. While at Olivetti Research (1988-91) he developed the Active Badge, a system for automatically locating people in a building. He joined Xerox PARC’s Ubiquitous Computing program in 1991 and lead a project called PARCTab, one of the first context-aware computer systems. More recent projects have included applications of electronic tagging and the design of PDAs that use manipulative user interfaces, such as the Hikari project. At PARC Want managed the Embedded Systems Area and earned the position of Principal Scientist. He joined Intel in 2000 and is currently exploring the concept of Dynamically Composable Computing, a paradigm that utilizes short-range wireless connectivity to seamlessly share nearby resources, enabling an effective mobile computing experience. The concept is a revolutionary approach that could change the way we use mobile computers.
Want is also the author, or co-author, of more than 50 publications in the areas of mobile and distributed systems; and also holds 53 patents. He is very involved in the research community through program committees, invited talks at conferences, and is Editor-in-Chief for IEEE Pervasive Computing. He is also a Fellow of both the IEEE and ACM.
For recreation he is a keen runner, hiker and skier. He has completed 3 marathons, and orienteers when his young family allows. A more complete summary of his work can be found at http://www.speakeasy.org/~roywant/vita.htm.
Sean is a technology evangelist in the Intel labs working to increase industry awareness of Intel’s future technology research and vision. Currently he works to evangelize the latest trends, strategies, and advancements in areas such as “Tera-scale” many-core processors, silicon photonics, and emerging “immersive connected experiences” such as virtual worlds and augmented reality.
Sean joined Intel in 1998 as an engineer working on silicon optical debug and spent the next five years contributing to the design, packaging and research of silicon devices for Intel’s Photonics Technology Lab. Later, as a Senior Technical Marketing Engineer, Sean worked to educate the public on Intel’s breakthroughs in the area of silicon photonics. Sean received a B.S. in Applied Physics from Purdue University and holds five patents in the area of silicon-based optoelectronics.
Stefano Pellerano was born in Bari, Italy. He received the Laurea Degree and the Ph.D. degree in electronics engineering from the Politecnico di Milano, Milan, Italy, in 2000 and in 2004, respectively. During his Ph.D., his activity was focused on the design of fully integrated frequency synthesizers for wireless LAN applications. In 2003 he has been a consultant with Agere Systems (former Bell Labs) in Allentown, PA. He is now with the Communications Technology Lab of Intel, Hillsboro, OR. His recent research interests include fully-integrated MIMO transceivers, mmWave radios and digital-style phase-locked loops for WiFi/WiMax applications in CMOS technology.
Tim Mattson earned a PhD. for his work on quantum molecular scattering theory (UCSC, 1985). This was followed by a Post-doc at Caltech where he worked on the Caltech/JPL hypercubes. Since then, he has held a number of commercial and academic positions with high performance computers as the common thread. Application areas have included mathematics libraries, exploration geophysics, computational chemistry, molecular biology, and bioinformatics.
Dr. Mattson joined Intel in 1993. Among his many roles at Intel, he was applications manager for the ASCI teraFLOPS project, helped create OpenMP, founded the Open Cluster Group (with it’s cluster package, OSCAR), and launched Intel’s programs in computing for the Life Sciences.
Currently, Dr. Mattson is conducting research on abstractions that bridge across parallel system design, parallel programming environments, and application software. This work builds on his recent book on Design Patterns in Parallel Programming (written with Professors Beverly Sanders and Berna Massingill and published by Addison Wesley). The patterns provide the “human angle” and help keep his research focused on technologies that help general programmers solve real problems.
Director, Energy Systems Research lab at Intel corporation. The lab is chartered to perform long term research related to the generation, distribution, distribution and control of energy as related to Intel’s practices, products and the eco-systems they impact.
Vijay Kesavan is a researcher at the Communications Technology Lab, Intel Research and Development. He has worked on various wired and wireless networking research projects and products in Intel. His is currently focusing on next-generation mobile broadband technologies. He has previously worked on seamless handovers in mixed network and has worked on the design and architecture of Ethernet switches, routers and network processors. He holds a Masters degree in Electrical Engineering, from Michigan State University.
Vinay Phegade is a security researcher and architect in Intel Labs. His research interests are developing security solutions to protect user’s online identity and transactions. He has been working at Intel since 2000.
Wen-Hann Wang is vice president of Intel Labs and director of Circuits and System Research for Intel Corporation. Prior to his current assignment, he served as vice president of the Software and Services Group (SSG) and general manager of Software and Solutions and Product Development in China. While in SSG, he also held general management positions for the Core Software, the Managed Runtime, and the Middleware Products divisions. He was also instrumental in establishing SSG’s presence in PRC.
Learn more at Wen-Hann’s executive biography
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